12#include <FairParGenericSet.h>
17#include <RtypesCore.h>
29 fMonitor->FillHistos(digi.get(), &raw);
34 fOptOutAVec->emplace_back(raw);
39 fOutputVec.emplace_back(*std::move(digi));
45 size_t spadicHwAddress = 0;
50 <<
"::makeDigi - No asic address "
51 "found for Spadic hardware address "
61 std::uint32_t elinkchannelid)
67 auto channelId = (
fAsicChannelMap.find(asicaddress))->second.at(asicChannelId);
75 LOG(info) << fName <<
"::initParSet - for container " << parset->ClassName();
80 if (parset->IsA() == CbmMcbm2020TrdTshiftPar::Class())
85 << fName <<
"::initParSet - for container " << parset->ClassName()
86 <<
" failed, since CbmTrdUnpackAlgoBaseR::initParSet() does not know the derived ParSet and what to do with it!";
93 LOG(debug) << fName <<
"::initParSetAsic - ";
97 LOG(error) << fName <<
"::initParSetAsic - SpadicAddressMap creation failed, the map is empty";
104 LOG(error) << fName <<
"::initParSetAsic - AsicChannelMap creation failed, the map is empty";
109 LOG(info) << fName <<
"::initParSetAsic - Successfully initialized Spadic hardware address map";
117 Bool_t initOk = kTRUE;
120 LOG(info) << fName <<
"::initParSet(CbmTrdParSetDigi) - Forwarding ParSetDigi to the monitor";
122 for (
auto pair : fParContVec) {
123 if ((pair.second).get()->IsA() != CbmTrdParSetAsic::Class())
continue;
126 initOk &=
fMonitor->Init(parset, asics);
127 fMonitor->SetDigiOutputVec(&fOutputVec);
138 fTimeshiftsMap.insert(maptimeshifts->begin(), maptimeshifts->end());
139 LOG(info) << fName <<
"::initParSetTimeshift2020() - Parsing timeshift correction map to unpacker algo";
157 <<
"::initR - We are missing a CbmTrdSpadic object, to extract the basic spadic functionalities!";
ClassImp(CbmConverterManager)
Baseclass for the TrdR unpacker algorithms.
std::map< size_t, std::vector< Int_t > > * GetTimeshiftsMap()
Return the timeshift map.
std::map< size_t, Int_t > CreateHwToSwAsicAddressTranslatorMap(bool isLoadedParameters)
Create a hardware to software asic addreess translator map, with hidden parameter loading.
std::map< Int_t, std::vector< Int_t > > CreateAsicChannelMap(bool isLoadedParameters)
Create a Asic Channel Map, with hidden parameter loading.
Describe TRD module ASIC settings (electronic gain, delays, etc)
Base class for storing raw information which comes from the Spadic v2.2 trough flib or from a tsa fil...
static UInt_t GetNrChannels()
std::shared_ptr< CbmTrdRawToDigiBaseR > fRTDMethod
raw to digi extraction method, set in the task
std::map< Int_t, std::vector< Int_t > > fAsicChannelMap
Map to retrieve module channelId from asicAddress and asicChannel.
void digestOutput(std::unique_ptr< CbmTrdDigi > digi, CbmTrdRawMessageSpadic raw)
Handle the output created by the explicit algorithms. E.g. write to output vectors.
Bool_t initParSet(FairParGenericSet *parset)
Handles the distribution of the hidden derived classes to their explicit functions.
std::shared_ptr< CbmTrdUnpackMonitor > fMonitor
Potential (online) monitor for the unpacking process.
std::shared_ptr< CbmTrdSpadic > fSpadic
Spadic software reprensentation object.
virtual Bool_t init()
Additional initialisation function for all BaseR derived algorithms.
virtual std::uint32_t getAsicAddress(std::uint32_t criid, std::uint32_t crobid, std::uint32_t elinkid)
Get the Asic Address (CbmAddress scheme) for the given hardware Ids.
CbmTrdUnpackAlgoBaseR(std::string name)
Create the Cbm Trd Unpack AlgoBase object.
std::uint32_t getChannelId(std::uint32_t asicaddress, std::uint32_t elinkid, std::uint32_t elinkchannelid)
Get the Channel Id (CbmAddress scheme) for the given hardware Ids.
Bool_t fIsFirstChannelsElinkEven
Define if the first 16 channels (00..15) are found on the even (set true) or odd (false) eLinkId....
virtual ~CbmTrdUnpackAlgoBaseR()
Destroy the Cbm Trd Unpack Task object.
std::map< size_t, Int_t > fSpadicAddressMap
Map to retrieve asic address from CriId/CrobId/ElinkId (see CbmTrdHardwareSetupR)
std::map< size_t, std::vector< Int_t > > fTimeshiftsMap
Map containing the timeshift parameters for the correction of the µSlice timeshifts....